Managing the power consumption of ICs is an increasingly difficult challenge, because each new generation of portable device includes expanded features and demands longer battery lives.

Grenoble, France – June 07, 2010 – Tiempo,SAS, a developer of innovative clockless technology for the design of low power integrated circuits (ICs), today announced its ability to support the use ...

There are a number of interesting technologies to keep an eye on in term of how and when they could be adopted for use in SoC design today, some of which include gallium arsenide, GPGPUs, 3D ICs and ...

Have you ever written code that behaves correctly under a simulator only to have intermittent failures in the field? Or maybe your code no longer functions properly when you compile with a newer ...

In the proper context, asynchronous logic in SoC design today can provide benefits. But what about impact on design tools and flows? In the right situation, using asynchronous logic makes a lot of ...

Lack of coordination between asynchronous resets and synchronous logic clocks leads to intermittent failures on power up. In this series of articles, we discuss the requirements and challenges of ...

FPGA-based emulation is more widely understood by engineers because engineers are used to designing with FPGAs. Much less well understood are processor-based emulators, and ample examples of ...