Why a new memory interface is needed. Features and benefits of DDR5. How DDR5 will usher in a new era of composable, scalable data centers. The move to DDR5 will probably be more important than most ...

The use of memory-heavy IP in SoCs for automotive, artificial intelligence (AI), and processor applications is steadily increasing. However, these memory-heavy IP often have only a single access point ...

When the Compute Express Link (CXL) Consortium was formed in March it made waves not only for its lofty aspirations but for the sheer amount of support it received. The proposed interconnect ...

Introduces industry-leading LPDDR5 CAMM2 PMIC and DDR5 Gen 2 Client PMIC alongside Client Clock Driver and SPD Hub for high-performance notebooks, desktops and workstations Supports wide range of ...

The Open Coherent Accelerator Processor Interface (OpenCAPI), announced at this week's Flash Memory Summit, is managed by the OpenCAPI Consortium. It’s a new high-performance bus interface designed ...

Next-generation automotive systems are advancing beyond the limits of currently available technologies. The addition of advanced driver assistance systems (ADAS) and other advanced features requires ...