It can run a 1bn gate design at around 5MHz, and at up to 100MHz for smaller designs after manual optimisation, Cadence marketing director Frank Schirrmeister told Electronics Weekly. Performance is ...

In August 2025, Cadence and NVIDIA announced a breakthrough in pre-silicon power analysis, enabling hardware-accelerated evaluation of billion-gate artificial intelligence chip designs using the ...

New Cadence Palladium Dynamic Power Analysis App enables designers of AI/ML chips and systems to create more energy-efficient designs and accelerate time to market The new Cadence Palladium ...

Cadence (Nasdaq: CDNS) today announced it has entered into a definitive agreement to acquire the Design & Engineering (“D&E”) business of Hexagon AB, which ...

SAN JOSE, Calif., August 13, 2025--Cadence announced a significant leap forward in the power analysis of pre-silicon designs through its close collaboration with NVIDIA.